mirror of
https://github.com/vsariola/sointu.git
synced 2025-05-28 03:10:24 -04:00
1ac2ad3c75
This makes all envelopes released by default, instead of attacking. Add also test to demonstrate the buggy behaviour.
432 lines
19 KiB
NASM
432 lines
19 KiB
NASM
{{if .HasOp "envelope" -}}
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;-------------------------------------------------------------------------------
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; ENVELOPE opcode: pushes an ADSR envelope value on stack [0,1]
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;-------------------------------------------------------------------------------
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; Mono: push the envelope value on stack
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; Stereo: push the envelope valeu on stack twice
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;-------------------------------------------------------------------------------
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{{.Func "su_op_envelope" "Opcode"}}
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{{- if .StereoAndMono "envelope"}}
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jnc su_op_envelope_mono
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{{- end}}
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{{- if .Stereo "envelope"}}
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call su_op_envelope_mono
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fld st0
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ret
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su_op_envelope_mono:
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{{- end}}
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mov eax, dword [{{.INP}}-su_voice.inputs+su_voice.sustain] ; eax = su_instrument.sustain
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test eax, eax ; if (eax != 0)
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jne su_op_envelope_process ; goto process
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mov al, {{.InputNumber "envelope" "release"}} ; [state]=RELEASE
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mov dword [{{.WRK}}], eax ; note that mov al, XXX; mov ..., eax is less bytes than doing it directly
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su_op_envelope_process:
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mov eax, dword [{{.WRK}}] ; al=[state]
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fld dword [{{.WRK}}+4] ; x=[level]
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cmp al, {{.InputNumber "envelope" "sustain"}} ; if (al==SUSTAIN)
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je short su_op_envelope_leave2 ; goto leave2
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su_op_envelope_attac:
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cmp al, {{.InputNumber "envelope" "attack"}} ; if (al!=ATTAC)
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jne short su_op_envelope_decay ; goto decay
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{{.Call "su_nonlinear_map"}} ; a x, where a=attack
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faddp st1, st0 ; a+x
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fld1 ; 1 a+x
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fucomi st1 ; if (a+x<=1) // is attack complete?
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fcmovnb st0, st1 ; a+x a+x
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jbe short su_op_envelope_statechange ; else goto statechange
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su_op_envelope_decay:
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cmp al, {{.InputNumber "envelope" "decay"}} ; if (al!=DECAY)
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jne short su_op_envelope_release ; goto release
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{{.Call "su_nonlinear_map"}} ; d x, where d=decay
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fsubp st1, st0 ; x-d
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fld dword [{{.Input "envelope" "sustain"}}] ; s x-d, where s=sustain
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fucomi st1 ; if (x-d>s) // is decay complete?
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fcmovb st0, st1 ; x-d x-d
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jnc short su_op_envelope_statechange ; else goto statechange
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su_op_envelope_release:
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cmp al, {{.InputNumber "envelope" "release"}} ; if (al!=RELEASE)
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jne short su_op_envelope_leave ; goto leave
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{{.Call "su_nonlinear_map"}} ; r x, where r=release
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fsubp st1, st0 ; x-r
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fldz ; 0 x-r
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fucomi st1 ; if (x-r>0) // is release complete?
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fcmovb st0, st1 ; x-r x-r, then goto leave
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jc short su_op_envelope_leave
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su_op_envelope_statechange:
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inc dword [{{.WRK}}] ; [state]++
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su_op_envelope_leave:
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fstp st1 ; x', where x' is the new value
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fst dword [{{.WRK}}+4] ; [level]=x'
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su_op_envelope_leave2:
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fmul dword [{{.Input "envelope" "gain"}}] ; [gain]*x'
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ret
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{{end}}
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{{- if .HasOp "noise"}}
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;-------------------------------------------------------------------------------
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; NOISE opcode: creates noise
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;-------------------------------------------------------------------------------
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; Mono: push a random value [-1,1] value on stack
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; Stereo: push two (differeent) random values on stack
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;-------------------------------------------------------------------------------
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{{.Func "su_op_noise" "Opcode"}}
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lea {{.CX}},[{{.Stack "RandSeed"}}]
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{{- if .StereoAndMono "noise"}}
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jnc su_op_noise_mono
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{{- end}}
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{{- if .Stereo "noise"}}
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call su_op_noise_mono
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su_op_noise_mono:
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{{- end}}
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imul eax, [{{.CX}}],16007
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mov [{{.CX}}],eax
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fild dword [{{.CX}}]
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{{- .Prepare (.Int 2147483648)}}
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fidiv dword [{{.Use (.Int 2147483648)}}] ; 65536*32768
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fld dword [{{.Input "noise" "shape"}}]
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{{.Call "su_waveshaper"}}
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fmul dword [{{.Input "noise" "gain"}}]
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ret
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{{end}}
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{{- if .HasOp "oscillator"}}
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;-------------------------------------------------------------------------------
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; OSCILLAT opcode: oscillator, the heart of the synth
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;-------------------------------------------------------------------------------
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; Mono: push oscillator value on stack
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; Stereo: push l r on stack, where l has opposite detune compared to r
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;-------------------------------------------------------------------------------
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{{.Func "su_op_oscillator" "Opcode"}}
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lodsb ; load the flags
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{{- if .Library}}
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mov {{.DI}}, [{{.Stack "SampleTable"}}]; we need to put this in a register, as the stereo & unisons screw the stack positions
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; ain't we lucky that {{.DI}} was unused throughout
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{{- end}}
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fld dword [{{.Input "oscillator" "detune"}}] ; e, where e is the detune [0,1]
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{{- .Prepare (.Float 0.5)}}
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fsub dword [{{.Use (.Float 0.5)}}] ; e-.5
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fadd st0, st0 ; d=2*e-.5, where d is the detune [-1,1]
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{{- if .StereoAndMono "oscillator"}}
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jnc su_op_oscillat_mono
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{{- end}}
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{{- if .Stereo "oscillator"}}
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fld st0 ; d d
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add {{.WRK}}, 4 ; move wrk...
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call su_op_oscillat_mono ; r d
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sub {{.WRK}}, 4 ; ...restore wrk
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fxch ; d r
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fchs ; -d r, negate the detune for second round
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su_op_oscillat_mono:
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{{- end}}
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{{- if .SupportsParamValueOtherThan "oscillator" "unison" 0}}
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{{.PushRegs .AX "" .WRK "OscWRK" .AX "OscFlags"}}
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fldz ; 0 d
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fxch ; d a=0, "accumulated signal"
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su_op_oscillat_unison_loop:
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fst dword [{{.SP}}] ; save the current detune, d. We could keep it in fpu stack but it was getting big.
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call su_op_oscillat_single ; s a
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faddp st1, st0 ; a+=s
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test al, 3
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je su_op_oscillat_unison_out
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add {{.WRK}}, 8 ; this is ok after all, as there's a pop in the end of unison loop
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fld dword [{{.Input "oscillator" "phase"}}] ; p s
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{{.Int 0x3DAAAAAA | .Prepare}}
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fadd dword [{{.Int 0x3DAAAAAA | .Use}}] ; 1/12 p s, add some little phase offset to unison oscillators so they don't start in sync
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fstp dword [{{.Input "oscillator" "phase"}}] ; s note that this changes the phase for second, possible stereo run. That's probably ok
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fld dword [{{.SP}}] ; d s
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{{.Float 0.5 | .Prepare}}
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fmul dword [{{.Float 0.5 | .Use}}] ; .5*d s // negate and halve the detune of each oscillator
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fchs ; -.5*d s // negate and halve the detune of each oscillator
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dec eax
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jmp short su_op_oscillat_unison_loop
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su_op_oscillat_unison_out:
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{{.PopRegs .AX .WRK .AX}}
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ret
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su_op_oscillat_single:
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{{- end}}
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fld dword [{{.Input "oscillator" "transpose"}}]
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{{- .Float 0.5 | .Prepare}}
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fsub dword [{{.Float 0.5 | .Use}}]
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{{- .Float 0.0078125 | .Prepare}}
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fdiv dword [{{.Float 0.0078125 | .Use}}]
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faddp st1
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{{- if .SupportsParamValue "oscillator" "lfo" 1}}
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test al, byte 0x08
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jnz su_op_oscillat_skipnote
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{{- end}}
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fiadd dword [{{.INP}}-su_voice.inputs+su_voice.note] ; // st0 is note, st1 is t+d offset
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{{- if .SupportsParamValue "oscillator" "lfo" 1}}
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su_op_oscillat_skipnote:
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{{- end}}
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{{- .Int 0x3DAAAAAA | .Prepare}}
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fmul dword [{{.Int 0x3DAAAAAA | .Use}}]
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{{.Call "su_power"}}
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{{- if .SupportsParamValue "oscillator" "lfo" 1}}
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test al, byte 0x08
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jz short su_op_oscillat_normalize_note
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{{- .Float 0.000038 | .Prepare}}
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fmul dword [{{.Float 0.000038 | .Use}}] ; // st0 is now frequency for lfo
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jmp short su_op_oscillat_normalized
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su_op_oscillat_normalize_note:
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{{- end}}
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{{- .Float 0.000092696138 | .Prepare}}
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fmul dword [{{.Float 0.000092696138 | .Use}}] ; // st0 is now frequency
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su_op_oscillat_normalized:
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fadd dword [{{.WRK}}]
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{{- if .SupportsParamValue "oscillator" "type" .Sample}}
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test al, byte 0x80
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jz short su_op_oscillat_not_sample
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fst dword [{{.WRK}}] ; for samples, we store the phase without mod(p,1)
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{{- if or (.SupportsParamValueOtherThan "oscillator" "phase" 0) (.SupportsModulation "oscillator" "phase")}}
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fadd dword [{{.Input "oscillator" "phase"}}]
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{{- end}}
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{{.Call "su_oscillat_sample"}}
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jmp su_op_oscillat_shaping ; skip the rest to avoid color phase normalization and colorloading
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su_op_oscillat_not_sample:
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{{- end}}
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fld1 ; we need to take mod(p,1) so the frequency does not drift as the float
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fadd st1, st0 ; make no mistake: without this, there is audible drifts in oscillator pitch
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fxch ; as the actual period changes once the phase becomes too big
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fprem ; we actually computed mod(p+1,1) instead of mod(p,1) as the fprem takes mod
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fstp st1 ; towards zero
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fst dword [{{.WRK}}] ; store back the updated phase
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{{- if or (.SupportsParamValueOtherThan "oscillator" "phase" 0) (.SupportsModulation "oscillator" "phase")}}
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fadd dword [{{.Input "oscillator" "phase"}}]
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fld1 ; this is a bit stupid, but we need to take mod(x,1) again after phase modulations
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fadd st1, st0 ; as the actual oscillator functions expect x in [0,1]
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fxch
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fprem
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fstp st1
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{{- end}}
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fld dword [{{.Input "oscillator" "color"}}] ; // c p
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; every oscillator test included if needed
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{{- if .SupportsParamValue "oscillator" "type" .Sine}}
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test al, byte 0x40
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jz short su_op_oscillat_notsine
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{{.Call "su_oscillat_sine"}}
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su_op_oscillat_notsine:
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{{- end}}
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{{- if .SupportsParamValue "oscillator" "type" .Trisaw}}
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test al, byte 0x20
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jz short su_op_oscillat_not_trisaw
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{{.Call "su_oscillat_trisaw"}}
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su_op_oscillat_not_trisaw:
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{{- end}}
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{{- if .SupportsParamValue "oscillator" "type" .Pulse}}
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test al, byte 0x10
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jz short su_op_oscillat_not_pulse
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{{.Call "su_oscillat_pulse"}}
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su_op_oscillat_not_pulse:
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{{- end}}
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{{- if .SupportsParamValue "oscillator" "type" .Gate}}
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test al, byte 0x04
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jz short su_op_oscillat_not_gate
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{{.Call "su_oscillat_gate"}}
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jmp su_op_oscillat_gain ; skip waveshaping as the shape parameter is reused for gateshigh
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su_op_oscillat_not_gate:
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{{- end}}
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su_op_oscillat_shaping:
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; finally, shape the oscillator and apply gain
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fld dword [{{.Input "oscillator" "shape"}}]
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{{.Call "su_waveshaper"}}
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su_op_oscillat_gain:
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fmul dword [{{.Input "oscillator" "gain"}}]
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ret
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{{end}}
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{{- if .HasCall "su_oscillat_pulse"}}
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{{.Func "su_oscillat_pulse"}}
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fucomi st1 ; // c p
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fld1
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jnc short su_oscillat_pulse_up ; // +1 c p
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fchs ; // -1 c p
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su_oscillat_pulse_up:
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fstp st1 ; // +-1 p
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fstp st1 ; // +-1
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ret
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{{end}}
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{{- if .HasCall "su_oscillat_trisaw"}}
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{{.Func "su_oscillat_trisaw"}}
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fucomi st1 ; // c p
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jnc short su_oscillat_trisaw_up
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fld1 ; // 1 c p
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fsubr st2, st0 ; // 1 c 1-p
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fsubrp st1, st0 ; // 1-c 1-p
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su_oscillat_trisaw_up:
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fdivp st1, st0 ; // tp'/tc
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fadd st0 ; // 2*''
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fld1 ; // 1 2*''
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fsubp st1, st0 ; // 2*''-1
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ret
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{{end}}
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{{- if .HasCall "su_oscillat_sine"}}
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{{.Func "su_oscillat_sine"}}
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fucomi st1 ; // c p
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jnc short su_oscillat_sine_do
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fstp st1
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fsub st0, st0 ; // 0
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ret
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su_oscillat_sine_do:
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fdivp st1, st0 ; // p/c
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fldpi ; // pi p
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fadd st0 ; // 2*pi p
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fmulp st1, st0 ; // 2*pi*p
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fsin ; // sin(2*pi*p)
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ret
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{{end}}
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{{- if .HasCall "su_oscillat_gate"}}
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{{.Func "su_oscillat_gate"}}
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fxch ; p c
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fstp st1 ; p
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{{- .Float 16.0 | .Prepare | indent 4}}
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fmul dword [{{.Float 16.0 | .Use}}] ; 16*p
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push {{.AX}}
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push {{.AX}}
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fistp dword [{{.SP}}] ; s=int(16*p), stack empty
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fld1 ; 1
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pop {{.AX}}
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and al, 0xf ; ax=int(16*p) & 15, stack: 1
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bt word [{{.VAL}}-4],ax ; if bit ax of the gate word is set
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jc su_oscillat_gate_bit ; goto gate_bit
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fsub st0, st0 ; stack: 0
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su_oscillat_gate_bit: ; stack: 0/1, let's call it x
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fld dword [{{.WRK}}+16] ; g x, g is gatestate, x is the input to this filter 0/1
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fsub st1 ; g-x x
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{{- .Float 0.99609375 | .Prepare | indent 4}}
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fmul dword [{{.Float 0.99609375 | .Use}}] ; c(g-x) x
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faddp st1, st0 ; x+c(g-x)
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fst dword [{{.WRK}}+16]; g'=x+c(g-x) NOTE THAT UNISON 2 & UNISON 3 ALSO USE {{.WRK}}+16, so gate and unison 2 & 3 don't work. Probably should delete that low pass altogether
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pop {{.AX}} ; Another way to see this (c~0.996)
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ret ; g'=cg+(1-c)x
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; This is a low-pass to smooth the gate transitions
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{{end}}
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{{- if .HasCall "su_oscillat_sample"}}
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{{.Func "su_oscillat_sample"}}
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{{- .PushRegs .AX "SampleAx" .DX "SampleDx" .CX "SampleCx" .BX "SampleBx" .DI "SampleDi" | indent 4}} ; edx must be saved, eax & ecx if this is stereo osc
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push {{.AX}}
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mov al, byte [{{.VAL}}-4] ; reuse "color" as the sample number
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{{- if .Library}}
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lea {{.DI}}, [{{.DI}} + {{.AX}}*8] ; edi points now to the sample table entry
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{{- else}}
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{{- .Prepare "su_sample_offsets" | indent 4}}
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lea {{.DI}}, [{{.Use "su_sample_offsets"}} + {{.AX}}*8]; edi points now to the sample table entry
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{{- end}}
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{{- .Float 84.28074964676522 | .Prepare | indent 4}}
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fmul dword [{{.Float 84.28074964676522 | .Use}}] ; p*r
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fistp dword [{{.SP}}]
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pop {{.DX}} ; edx is now the sample number
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movzx ebx, word [{{.DI}} + 4] ; ecx = loopstart
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sub edx, ebx ; if sample number < loop start
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jl su_oscillat_sample_not_looping ; then we're not looping yet
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mov eax, edx ; eax = sample number
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movzx ecx, word [{{.DI}} + 6] ; edi is now the loop length
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xor edx, edx ; div wants edx to be empty
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div ecx ; edx is now the remainder
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su_oscillat_sample_not_looping:
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add edx, ebx ; sampleno += loopstart
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add edx, dword [{{.DI}}]
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{{- .Prepare "su_sample_table" | indent 4}}
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fild word [{{.Use "su_sample_table"}} + {{.DX}}*2]
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{{- .Float 32767.0 | .Prepare | indent 4}}
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fdiv dword [{{.Float 32767.0 | .Use}}]
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{{- .PopRegs .AX .DX .CX .BX .DI | indent 4}}
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ret
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{{end}}
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{{- if .HasOp "loadval"}}
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;-------------------------------------------------------------------------------
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; LOADVAL opcode
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;-------------------------------------------------------------------------------
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{{- if .Mono "loadval"}}
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; Mono: push 2*v-1 on stack, where v is the input to port "value"
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{{- end}}
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{{- if .Stereo "loadval"}}
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; Stereo: push 2*v-1 twice on stack
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{{- end}}
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;-------------------------------------------------------------------------------
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{{.Func "su_op_loadval" "Opcode"}}
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{{- if .StereoAndMono "loadval" }}
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jnc su_op_loadval_mono
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{{- end}}
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{{- if .Stereo "loadval" }}
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call su_op_loadval_mono
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su_op_loadval_mono:
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{{- end }}
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fld dword [{{.Input "loadval" "value"}}] ; v
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{{- .Float 0.5 | .Prepare | indent 4}}
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fsub dword [{{.Float 0.5 | .Use}}]
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fadd st0 ; 2*v-1
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ret
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{{end}}
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{{- if .HasOp "receive"}}
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;-------------------------------------------------------------------------------
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; RECEIVE opcode
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;-------------------------------------------------------------------------------
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{{- if .Mono "receive"}}
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; Mono: push l on stack, where l is the left channel received
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{{- end}}
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{{- if .Stereo "receive"}}
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; Stereo: push l r on stack
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{{- end}}
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;-------------------------------------------------------------------------------
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{{.Func "su_op_receive" "Opcode"}}
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lea {{.DI}}, [{{.WRK}}+su_unit.ports]
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{{- if .StereoAndMono "receive"}}
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jnc su_op_receive_mono
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{{- end}}
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{{- if .Stereo "receive"}}
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xor ecx,ecx
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fld dword [{{.DI}}+4]
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mov dword [{{.DI}}+4],ecx
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{{- end}}
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{{- if .StereoAndMono "receive"}}
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su_op_receive_mono:
|
|
xor ecx,ecx
|
|
{{- end}}
|
|
fld dword [{{.DI}}]
|
|
mov dword [{{.DI}}],ecx
|
|
ret
|
|
{{end}}
|
|
|
|
|
|
{{- if .HasOp "in"}}
|
|
;-------------------------------------------------------------------------------
|
|
; IN opcode: inputs and clears a global port
|
|
;-------------------------------------------------------------------------------
|
|
; Mono: push the left channel of a global port (out or aux)
|
|
; Stereo: also push the right channel (stack in l r order)
|
|
;-------------------------------------------------------------------------------
|
|
{{.Func "su_op_in" "Opcode"}}
|
|
lodsb
|
|
mov {{.DI}}, [{{.Stack "Synth"}}]
|
|
{{- if .StereoAndMono "in"}}
|
|
jnc su_op_in_mono
|
|
{{- end}}
|
|
{{- if .Stereo "in"}}
|
|
xor ecx, ecx ; we cannot xor before jnc, so we have to do it mono & stereo. LAHF / SAHF could do it, but is the same number of bytes with more entropy
|
|
fld dword [{{.DI}} + su_synthworkspace.right + {{.AX}}*4]
|
|
mov dword [{{.DI}} + su_synthworkspace.right + {{.AX}}*4], ecx
|
|
{{- end}}
|
|
{{- if .StereoAndMono "in"}}
|
|
su_op_in_mono:
|
|
xor ecx, ecx
|
|
{{- end}}
|
|
fld dword [{{.DI}} + su_synthworkspace.left + {{.AX}}*4]
|
|
mov dword [{{.DI}} + su_synthworkspace.left + {{.AX}}*4], ecx
|
|
ret
|
|
{{end}}
|